2D In-Memory Processor Achieves Remarkable Milestone with Over 1000 Transistors

A team of researchers from EPFL have designed an energy-efficient in-memory processor with the use of MoS2 and integrated more than 1000 transistors. This energy-efficient processor is capable of executing efficient vector-matrix multiplication and signifies departure from the commonly used von Neumann architecture. The invention could potentially uplift the European semiconductor industry.

The inaugural large-scale in-memory processor by the EPFL researchers, which utilizes 2D semiconductor materials, has the potential to significantly reduce the energy consumption of the ICT sector.

The global CO2 footprint of the existing information and communication technologies (ICT) is as large as that of the aviation industry due to the conversion of electricity into heat during the data processing. Interestingly, a significant portion of the energy used up by the computer processors is not utilized in calculation activities, rather it is used up in transferring bytes from the memory to the processor.

On November 13, a research paper was published in the journal Nature Electronics featuring the invention of a new processor by the researchers from EPFL’s School of Engineering from the Laboratory of Nanoscale Electronics and Structures (LANES). This processor is characterized by a unique feature of integrating data processing and storage onto a single device, known as an in-memory processor. It is the first in-memory processor to be based on a two-dimensional semiconductor material and to contain more than 1000 transistors, signifying a major step towards industrial production.

An identical paper was published in the journal Nature Electronics by the same researchers from EPFL’s School of Engineering in LANES, where they emphasized on the creation of the new in-memory processor capable of integrating data processing and storage onto a single device. This research signifies the first instance of an in-memory processor being based on a two-dimensional semiconductor material and containing more than 1000 transistors, marking a critical step in the direction of industrial production. Credit: 2023 EPFL / Alan Herzog

Andras Kis, the leader of the research argues that the main reason behind the inefficiency of the current CPUs is the design of the von Neumann architecture that separates the components used for performing calculations and storing data. Due to this separation, the processors need to move electronic charges and transmit current for retrieving data from the memory for calculations, which results in energy dissipation.

The von Neumann architecture was beneficial until about two decades ago when different devices were required for data storage and processing. However, recent years have seen several effective alternatives to this architecture. In order to merge data storage and processing into a more general in-memory processor, Kis's laboratory has been exploring effective methods with the usage of a semiconductor material, molybdenum disulfide (MoS2).

In their paper published in Nature Electronics, Guilherme Migliato Marega, a doctoral assistant at LANES, and his co-researchers introduced an MoS2-based in-memory processor that is designed for one of the basic tasks in data processing: vector-matrix multiplication. Improving its efficiency could lead to significant energy savings in the whole ICT sector.

Their innovative processor integrates 1024 elements onto a one-by-one-centimeter chip. Each element is composed of a 2D MoS2 transistor in addition to a floating gate that stores a charge controlling the conductivity of each transistor. By joining memory and processing, the calculation is significantly altered. According to Kis, by managing the conductivity of each transistor, analog vector-matrix multiplication can be easily performed in a single step by applying voltage to the processor and assessing the output.

The material chosen for the construction of their in-memory processor, MoS2, played a crucial part in the invention. MoS2, a semiconductor material, is essential for the development of transistors. Unlike silicon which is vastly used in current computer processors, MoS2 creates a stable monolayer with a mere thickness of three atoms. Additionally, it exhibits negligible interaction with the surroundings. Due to its thinness, it is possible to design very compact devices. Furthermore, Kis's lab is familiar with this material. In 2010, they developed their first MoS2 transistor using a monolayer of the material peeled off a crystal with Scotch tape.

Over the past 13 years, their processes have matured substantially, with Migliato Marega’s contributions playing a key role. “The key advance in going from a single transistor to over 1000 was the quality of the material that we can deposit. After a lot of process optimization, we can now produce entire wafers covered with a homogenous layer of uniform MoS2. This lets us adopt industry standard tools to design integrated circuits on a computer and translate these designs into physical circuits, opening the door to mass production,” says Kis.

Aside from its purely scientific value, Kis sees this result as a testament to the importance of close scientific collaboration between Switzerland and the EU, in particular in the context of the European Chips Act, which aims to bolster Europe’s competitiveness and resilience in semiconductor technologies and applications. “EU funding was crucial for both this project and those that preceded it, including the one that financed the work on the first MoS2 transistor, showing just how important it is for Switzerland,” says Kis.

“At the same time, it shows how work carried out in Switzerland can benefit the EU as it seeks to reinvigorate electronics fabrication. Rather than running the same race as everyone else, the EU could, for example, focus on developing non-von Neumann processing architectures for AI accelerators and other emerging applications. By defining its own race, the continent could get a head start to secure a strong position in the future,” he concludes.

Reference: “A large-scale integrated vector–matrix multiplication processor based on monolayer molybdenum disulfide memories” by Guilherme Migliato Marega, Hyun Goo Ji, Zhenyu Wang, Gabriele Pasquale, Mukesh Tripathi, Aleksandra Radenovic and Andras Kis, 13 November 2023, Nature Electronics.DOI: 10.1038/s41928-023-01064-1